Technology Field
The present invention relates to a data erasing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same.
Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand for storage media has increased drastically. Since a rewritable non-volatile memory is characterized by non-volatility of data, low power consumption, small capacity, non-mechanical structure, and fast reading and writing speed, the rewritable non-volatile memory is the most adaptable memory to be applied in a portable electronic product, e.g., a notebook computer. A solid state drive is a storage apparatus adopting flash memory as storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
The flash memory module has several physical erasing units and every physical erasing unit has several physical programming units, wherein it must write data with the order of the physical programming units when writing data in the physical erasing units. In addition, a physical programming unit containing data must to be erased before being used for writing new data. Particularly, each physical erasing unit is the smallest erasing unit, and each physical programming unit is the smallest programming (i.e., writing) unit. Therefore, in the management of the flash memory module, the physical erasing units are grouped into a data area and a spare area.
The physical erasing units of the data area are used for storing data written by the host system. To be more specific, a memory control circuit unit in a memory storage apparatus converts a logical access address accessed by the host system into a logical sub-unit of a logical unit and maps the logical sub-unit of the logical unit to a physical programming unit of a physical erasing unit in the data area. Namely, in the management of a flash memory module, the physical erasing units in the data area are deemed used physical erasing units (e.g., the physical erasing units already contain data written by the host system). For example, the memory control circuit unit may use the logical address-physical address mapping table to record the mapping relation of logical units and the physical erasing units of the data area, wherein the logical sub-units of a logical unit are corresponding to the physical programming units of the physical erasing unit mapped to this logical unit.
And, the physical erasing units of the spare area are used for substituting the physical erasing units of the data area. In particular, a physical erasing unit already containing data has to be erased before being used for writing new data, such that a physical erasing unit in the spare area is used for writing updated data in replacement of the physical erasing unit originally mapped to a logical unit. Hence, the physical erasing units in the spare area are either blank physical erasing units or usable physical erasing units (i.e., these physical erasing units do not contain data, or these physical erasing units contain data marked as being in an invalid data status).
In other words, the physical programming units of the physical erasing units in the data area and the spare area alternately map the logical sub-units of the logical units for containing data written by the host system. Thus, when the host system send a delete command asking for clearing the data of a logical sub-unit, the memory control circuit unit will mark the physical programming unit which mapped to this logical sub-unit (hereinafter, refer to the invalid data logical sub-unit) as being in an invalid data status. Even though the physical programming units mapped to the invalid data logical sub-units are already marked as being in an invalid data status in the management information of the memory control circuit unit, the data in the physical programming units would not really be deleted. Therefore, the data is still under a risk of being stolen.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.